A3C3: AI Algorithm and Accelerator Co-design, Co-search, and Co-generation

A new methodology called A3C3 proposes jointly optimizing neural network architectures and their hardware accelerators, moving beyond the conventional practice of designing algorithms and hardware in separate stages. The approach, detailed in a forthcoming book chapter, aims to automatically generate model-accelerator pairs that balance multiple performance metrics. The framework, formally titled AI Algorithm and Accelerator Co-design, Co-search, and Co-generation, is authored by Selin Yildirim and appears in the "Handbook of Embedded Machine Learning," edited by Sudeep Pasricha and Muhammad Shafique for Springer Nature [1][2]. Traditional AI system design typically follows a sequential path: a neural network model is first developed to maximize accuracy, and only later is it adapted to fit the constraints of a specific hardware platform, such as latency, throughput, or energy budgets [1][2]. This separation can produce suboptimal results, a problem that intensifies as modern AI workloads grow more heterogeneous, memory-intensive, and dependent on the underlying platform [1][2]. A3C3 addresses this by parameterizing both the algorithmic and accelerator design spaces and searching them simultaneously [1][2]. The methodology enables the automatic generation of model-accelerator pairs that are co-optimized for accuracy, latency, throughput, energy efficiency, and hardware utilization [1][2]. The work is presented as a book chapter, reflecting its role as a reference for embedded machine learning practitioners rather than a standalone conference paper [1][2]. Embedded AI systems, which deploy machine learning on resource-constrained devices at the network edge, face acute design pressures. The co-design paradigm has gained traction as a way to escape the limitations of one-size-fits-all accelerator designs and hand-crafted neural networks. By jointly exploring the design space, methodologies like A3C3 aim to uncover configurations that a sequential design flow would likely miss [1][2]. The chapter contributes to a broader body of literature in the "Handbook of Embedded Machine Learning," which surveys techniques for efficient deep learning on embedded systems [1][2].