MLVC: Multi-platform Learned Video Codec for Real-World Deployment
- company Apple
- company Intel
- company Qualcomm
- lab arXivLabs
- location Taiwan
- model DCVC-RT
- model HEVC
- model MLVC
A team of researchers has introduced MLVC, a neural video codec engineered to deliver consistent performance across consumer hardware from Apple, Intel, and Qualcomm, overcoming a key barrier that has kept such codecs confined to research labs. The codec, detailed in a paper submitted on 26 Jun 2026, is designed to solve a fundamental problem: existing neural video codecs, while more efficient than classical standards, produce non-deterministic results on different hardware platforms, leading to catastrophic decoding failures [1]. MLVC avoids this by explicitly transmitting scale parameters through a hyperprior, which guarantees entropy coding consistency across devices without requiring bit-exact arithmetic [1]. While this method introduces some bitrate overhead, the team recovered most of the lost efficiency through architectural changes, including gated memory and ReGLU activation, a long-term reference recovery mechanism, and domain-specific perceptual training [1]. On the VCD video conferencing benchmark, MLVC achieved a greater than 70% BD-rate improvement, measured by mean opinion score, over hardware HEVC, which the authors describe as the strongest deployable baseline [1]. Its subjective quality was competitive with DCVC-RT, a neural codec that cannot operate across diverse platforms [1]. Both the encoder and decoder run at an average of 100 FPS on commodity neural processing units from Apple, Intel, and Qualcomm [1]. The paper states this is the first neural video codec to combine competitive compression, real-time speed, and cross-platform robustness on consumer devices [1]. The challenge of cross-platform consistency is not unique to video codecs. A separate study on WebGPU dispatch overhead for large language model inference found that per-operation validation costs vary significantly across GPU vendors and backends, with per-dispatch overhead ranging from 24-36 µs on Vulkan to 32-71 µs on Metal [3]. That research, which tested hardware from NVIDIA, AMD, Apple, and Intel, concluded that per-operation overhead dominates performance in dispatch-heavy pipelines, a finding that underscores the difficulty of achieving uniform inference behavior across heterogeneous hardware [3]. Apple's own history of processor transitions illustrates the complexity of maintaining software compatibility across architectures. The company has switched its Mac line's central processors three times: from Motorola 68000 to PowerPC in 1994, from PowerPC to Intel x86 in 2006, and from Intel to its own ARM-based Apple silicon, a process announced in 2020 and completed in 2023 [7]. Each transition required extensive software adaptation, including binary translation layers like Rosetta, to bridge incompatible instruction set architectures [6]. The MLVC codec's approach to hardware robustness addresses a parallel challenge at the application level, aiming to make a single model viable across the fragmented landscape of consumer NPUs without per-platform tuning.
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Background sources we checked (6)
- arxiv.org ↗ Neural video codecs have surpassed classical codecs in coding efficiency but remain impractical for deployment due to cross-platform incompatibility and high computational cost. Existing quantization-based solutions fail to produce deterministic results across diverse hardware pl…
- arxiv.org ↗ WebGPU's security-focused design imposes per-operation validation that compounds across the many small dispatches in neural network inference, yet the true cost of this overhead is poorly characterized. We present a systematic characterization of WebGPU dispatch overhead for LLM …
- arxiv.org ↗ Traditional side-channels take advantage of secrets being used as inputs to unsafe instructions, used for memory accesses, or used in control flow decisions. Constant-time programming, which restricts such code patterns, has been widely adopted as a defense against these vulnerab…
- en.wikipedia.org ↗ The Apple–Intel architecture is an unofficial name used for Macintosh personal computers developed and manufactured by Apple Inc. that use Intel x86 processors, rather than the PowerPC and Motorola 68000 ("68k") series processors used in their predecessors or the ARM-based Apple …
- en.wikipedia.org ↗ The Mac transition to Intel processors was the process of switching the central processing units (CPUs) of Apple's line of Mac and Xserve computers from PowerPC processors over to Intel's x86-64 processors. The change was announced at the 2005 Worldwide Developers Conference (WWD…
- en.wikipedia.org ↗ The Mac transition to Apple silicon was the process of switching the central processing units (CPUs) of Apple's line of Mac computers from Intel's x86-64 processors to Apple-designed Apple silicon ARM64 systems-on-a-chip. Apple CEO Tim Cook announced a "two-year transition plan" …
Sources
- export.arxiv.org — MLVC: Multi-platform Learned Video Codec for Real-World Deployment ↗